Timing models in VAL/VHDL

Larry M. Augustin. Timing models in VAL/VHDL. In 1989 IEEE International Conference on Computer-Aided Design, ICCAD 1989, Santa Clara, CA, USA, November 5-9, 1989. Digest of Technical Papers. pages 122-125, IEEE, 1989. [doi]

Abstract

Abstract is missing.