Seung-Jun Bae, Young-Soo Sohn, Kwang-Il Park, Kyoung-Ho Kim, Dae-Hyun Chung, Jingook Kim, Si-Hong Kim, Min-Sang Park, Jae-Hyung Lee, Sam-Young Bang, Ho-Kyung Lee, In-Soo Park, Jae-Sung Kim, Dae-Hyun Kim, Hye-Ran Kim, Yong-Jae Shin, Cheol-Goo Park, Gil-Shin Moon, Ki-Woong Yeom, Kang-Young Kim, Jae Young Lee, Hyang-Ja Yang, Seong-Jin Jang, Joo-Sun Choi, Young-Hyun Jun, Kinam Kim. A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques. In 2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008. pages 278-279, IEEE, 2008. [doi]
@inproceedings{BaeSPKCKKPLBLPKKKSPMYKLYJCJK08,
title = {A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques},
author = {Seung-Jun Bae and Young-Soo Sohn and Kwang-Il Park and Kyoung-Ho Kim and Dae-Hyun Chung and Jingook Kim and Si-Hong Kim and Min-Sang Park and Jae-Hyung Lee and Sam-Young Bang and Ho-Kyung Lee and In-Soo Park and Jae-Sung Kim and Dae-Hyun Kim and Hye-Ran Kim and Yong-Jae Shin and Cheol-Goo Park and Gil-Shin Moon and Ki-Woong Yeom and Kang-Young Kim and Jae Young Lee and Hyang-Ja Yang and Seong-Jin Jang and Joo-Sun Choi and Young-Hyun Jun and Kinam Kim},
year = {2008},
doi = {10.1109/ISSCC.2008.4523165},
url = {http://dx.doi.org/10.1109/ISSCC.2008.4523165},
researchr = {https://researchr.org/publication/BaeSPKCKKPLBLPKKKSPMYKLYJCJK08},
cites = {0},
citedby = {0},
pages = {278-279},
booktitle = {2008 IEEE International Solid-State Circuits Conference, ISSCC 2008, Digest of Technical Papers, San Francisco, CA, USA, February 3-7, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2010-0},
}