Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM - researchr publication authors

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Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq. Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. In 2015 International Conference on IC Design & Technology, ICICDT 2015, Leuven, Belgium, June 1-3, 2015. pages 1-4, IEEE, 2015. [doi]

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