Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM

Trong Huynh Bao, Sushil Sakhare, Julien Ryckaert, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Voon-Yew Thean, Piet Wambacq. Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM. In 2015 International Conference on IC Design & Technology, ICICDT 2015, Leuven, Belgium, June 1-3, 2015. pages 1-4, IEEE, 2015. [doi]

@inproceedings{BaoSRYMVTW15,
  title = {Design technology co-optimization for enabling 5nm gate-all-around nanowire 6T SRAM},
  author = {Trong Huynh Bao and Sushil Sakhare and Julien Ryckaert and Dmitry Yakimets and Abdelkarim Mercha and Diederik Verkest and Aaron Voon-Yew Thean and Piet Wambacq},
  year = {2015},
  doi = {10.1109/ICICDT.2015.7165874},
  url = {http://dx.doi.org/10.1109/ICICDT.2015.7165874},
  researchr = {https://researchr.org/publication/BaoSRYMVTW15},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2015 International Conference on IC Design & Technology, ICICDT 2015, Leuven, Belgium, June 1-3, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7669-0},
}