A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers

Mehdi Bathaee, Zed Mostoufi, Hamid Ghezelayagh, Anahita Afkham. A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS technology with LVDS output data bus drivers. In Proceedings of the 2002 9th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2002, Dubrovnik, Croatia, September 15-18, 2002. pages 839-841, IEEE, 2002. [doi]

Abstract

Abstract is missing.