Shabbir H. Batterywala, Narendra V. Shenoy. Computing Silent Gate Models for Noise Analysis from Slew and Delay Tables. In 17th International Conference on VLSI Design (VLSI Design 2004), with the 3rd International Conference on Embedded Systems Design, 5-9 January 2004, Mumbai, India. pages 989-994, IEEE Computer Society, 2004. [doi]
Abstract is missing.