Cyrus Bazeghi, Francisco J. Mesa-Martinez, Jose Renau. System and Procesor Design Effort Estimation. In VLSI-SoC: Advanced Topics on Systems on a Chip - A Selection of Extended Versions of the Best Papers of the Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2007), October 15-17, 2007, Atlanta, USA. Volume 291 of IFIP, pages 1-21, Springer, 2007. [doi]
Abstract is missing.