Cinzia Bernardeschi, Luca Cassano, Andrea Domenici, Luca Sterpone. Accurate simulation of SEUs in the configuration memory of SRAM-based FPGAs. In 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2012, Austin, TX, USA, October 3-5, 2012. pages 115-120, IEEE Computer Society, 2012. [doi]
Abstract is missing.