ASSESS: A Simulator of Soft Errors in the Configuration Memory of SRAM-Based FPGAs

Cinzia Bernardeschi, Luca Cassano, Andrea Domenici, Luca Sterpone. ASSESS: A Simulator of Soft Errors in the Configuration Memory of SRAM-Based FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems, 33(9):1342-1355, 2014. [doi]

Abstract

Abstract is missing.