Anna Bernasconi, Valentina Ciriani. Logic synthesis and testability of D-reducible functions. In 18th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010. pages 280-285, IEEE, 2010. [doi]
Abstract is missing.