SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis

Rahul Bhattacharya, S. H. M. Ragamai, Subindu Kumar. SFG Based Fault Simulation of Linear Analog Circuits Using Fault Classification and Sensitivity Analysis. In Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh, editors, VLSI Design and Test - 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017, Revised Selected Papers. Volume 711 of Communications in Computer and Information Science, pages 179-190, Springer, 2017. [doi]

Abstract

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