Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit

Partha Bhattacharyya, Bijoy Kundu, Sovan Ghosh, Vinay Kumar, Anup Dandapat. Performance Analysis of a Low-Power High-Speed Hybrid 1-bit Full Adder Circuit. IEEE Trans. VLSI Syst., 23(10):2001-2008, 2015. [doi]

Abstract

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