Arnab Biswas, Luca De Michielis, Antonios Bazigos, Adrian Mihai Ionescu. Compact modeling of DG-Tunnel FET for Verilog-A implementation. In 45th European Solid State Device Research Conference, ESSDERC 2015, Graz, Austria, September 14-18, 2015. pages 40-43, IEEE, 2015. [doi]
Abstract is missing.