High speed semiconductor fab simulation for large, medium and small lot sizes

Peter C. Bosch, Robert L. Wright. High speed semiconductor fab simulation for large, medium and small lot sizes. In Scott J. Mason, Raymond R. Hill, Lars Mönch, Oliver Rose, Thomas Jefferson, John W. Fowler, editors, Proceedings of the 2008 Winter Simulation Conference, Global Gateway to Discovery, WSC 2008, InterContinental Hotel, Miami, Florida, USA, December 7-10, 2008. pages 2305-2312, WSC, 2008. [doi]

Abstract

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