Design techniques for CMOS backplane transceivers approaching 30-Gb/s data rates

John F. Bulzacchelli. Design techniques for CMOS backplane transceivers approaching 30-Gb/s data rates. In Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, San Jose, CA, USA, September 22-25, 2013. pages 1-8, IEEE, 2013. [doi]

Abstract

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