SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience

Doron Bustan, Dmitry Korchemny, Erik Seligman, Jin Yang. SystemVerilog Assertions: Past, Present, and Future SVA Standardization Experience. IEEE Design & Test of Computers, 29(2):23-31, 2012. [doi]

Authors

Doron Bustan

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Dmitry Korchemny

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Erik Seligman

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Jin Yang

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