On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress

Fabrice Caignet, Nicolas Nolhier, M. Bafleur, A. Wang, Nicolas Mauran. On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress. Microelectronics Reliability, 53(9-11):1278-1283, 2013. [doi]

Abstract

Abstract is missing.