A power-efficient network on-chip topology

J. Camacho, José Flich, José Duato, Hans Eberle, Wladek Olesinski. A power-efficient network on-chip topology. In José Flich, Davide Bertozzi, Tor Skeie, Daniele Ludovici, editors, Proceedings of the Fifth International Workshop on Interconnection Network Architecture - On-Chip, Multi-Chip, INA-OCMC '11, Heraklion, Greece, January 23, 2011. pages 23-26, ACM, 2011. [doi]

Abstract

Abstract is missing.