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Hyungil Chae, Michael P. Flynn. A 69 dB SNDR, 25 MHz BW, 800 MS/s Continuous-Time Bandpass ΔΣ Modulator Using a Duty-Cycle-Controlled DAC for Low Power and Reconfigurability. J. Solid-State Circuits, 51(3):649-659, 2016. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: A 12 mW Low Power Continuous-Time Bandpass ΔΣ Modulator With 58 dB SNDR and 24 MHz Bandwidth at 200 MHz IFHyungil Chae, Jaehun Jeong, Gabriele Manganaro, Michael P. Flynn. jssc, 49(2):405-415, 2014. [doi] A 12mW low-power continuous-time bandpass ΔΣ modulator with 58dB SNDR and 24MHz bandwidth at 200MHz IFHyungil Chae, Jaehun Jeong, Gabriele Manganaro, Michael Flynn. isscc 2012: 148-150 [doi]
The following publications are possibly variants of this publication: