An efficient timing model for hardware implementation of multirate dataflow graphs

Nitin Chandrachoodan, Shuvra S. Bhattacharyya, K. J. Ray Liu. An efficient timing model for hardware implementation of multirate dataflow graphs. In IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2001, 7-11 May, 2001, Salt Palace Convention Center, Salt Lake City, Utah, USA, Proceedings. pages 1153-1156, IEEE, 2001. [doi]

Abstract

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