Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation

Ming-Hung Chang, Chung-Ying Hsieh, Mei-Wei Chen, Wei Hwang. Near-/sub-threshold DLL-based clock generator with PVT-aware locking range compensation. In Vojin G. Oklobdzija, Barry Pangle, Naehyuck Chang, Naresh R. Shanbhag, Chris H. Kim, editors, Proceedings of the 2010 International Symposium on Low Power Electronics and Design, 2010, Austin, Texas, USA, August 18-20, 2010. pages 15-20, ACM, 2011. [doi]

Abstract

Abstract is missing.