S. G. Chappell, Stephen S. Yau. Simulation of large asynchronous logic circuits using an ambiguous gate model. In American Federation of Information Processing Societies: Proceedings of the AFIPS '71 Fall Joint Computer Conference, November 16-18, 1971, Las Vegas, Nevada, USA. Volume 39 of AFIPS Conference Proceedings, pages 651-661, AFIPS / ACM, 1971. [doi]
Abstract is missing.