A DFT Technique for Delay Fault Testability and Diagnostics in 32-Bit High Performance CMOS ALUs - researchr publication

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Bhaskar Chatterjee, Manoj Sachdev, Ali Keshavarzi. A DFT Technique for Delay Fault Testability and Diagnostics in 32-Bit High Performance CMOS ALUs. In Proceedings 2004 International Test Conference (ITC 2004), October 26-28, 2004, Charlotte, NC, USA. pages 1108-1117, IEEE, 2004. [doi]

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