An Adaptive-Rate Error Correction Scheme for NAND Flash Memory

Te-Hsuan Chen, Yu-Ying Hsiao, Yu-Tsao Hsing, Cheng-Wen Wu. An Adaptive-Rate Error Correction Scheme for NAND Flash Memory. In 27th IEEE VLSI Test Symposium, VTS 2009, May 3-7, 2009, Santa Cruz, California, USA. pages 53-58, IEEE Computer Society, 2009. [doi]

Authors

Te-Hsuan Chen

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Yu-Ying Hsiao

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Yu-Tsao Hsing

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Cheng-Wen Wu

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