A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-µm CMOS

Liang-Jen Chen, Shen-Iuan Liu. A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-µm CMOS. IEEE Trans. VLSI Syst., 24(4):1470-1483, 2016. [doi]

Abstract

Abstract is missing.