Wafer Level Chip Scale Package copper pillar probing

Hao Chen, Hung-Chih Lin, Ching-Nen Peng, Min-Jer Wang. Wafer Level Chip Scale Package copper pillar probing. In 2014 International Test Conference, ITC 2014, Seattle, WA, USA, October 20-23, 2014. pages 1-6, IEEE, 2014. [doi]

@inproceedings{ChenLPW14,
  title = {Wafer Level Chip Scale Package copper pillar probing},
  author = {Hao Chen and Hung-Chih Lin and Ching-Nen Peng and Min-Jer Wang},
  year = {2014},
  doi = {10.1109/TEST.2014.7035315},
  url = {http://doi.ieeecomputersociety.org/10.1109/TEST.2014.7035315},
  researchr = {https://researchr.org/publication/ChenLPW14},
  cites = {0},
  citedby = {0},
  pages = {1-6},
  booktitle = {2014 International Test Conference, ITC 2014, Seattle, WA, USA, October 20-23, 2014},
  publisher = {IEEE},
  isbn = {978-1-4799-4722-5},
}