A novel hybrid delay testing scheme with low test power, volume, and time

Zhen Chen, Sharad C. Seth, Dong Xiang. A novel hybrid delay testing scheme with low test power, volume, and time. In 28th IEEE VLSI Test Symposium, VTS 2010, April 19-22, 2010, Santa Cruz, California, USA. pages 307-312, IEEE Computer Society, 2010. [doi]

Abstract

Abstract is missing.