A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology

Wei-Chih Chen, Chien-Chun Tsai, Chih-Hsien Chang, Yung-Chow Peng, Fu-Lung Hsueh, Tsung-Hsin Yu, Jinn-Yeh Chien, Wen-Hung Huang, Chi-Chang Lu, Mu-Shan Lin, Chin-Ming Fu, Shu-Chun Yang, Chung-Wing Wong, Wan-Te Chen, Chin-Hua Wen, Li Yueh Wang, Chiang Pu. A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology. In Jacqueline Snyder, Rakesh Patel, Tom Andre, editors, IEEE Custom Integrated Circuits Conference, CICC 2010, San Jose, California, USA, 19-22 September, 2010, Proceedings. pages 1-4, IEEE, 2010. [doi]

Abstract

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