Jifeng Chen, Shuo Wang, Mohammad Tehranipoor. Efficient selection and analysis of critical-reliability paths and gates. In Erik Brunvard, Ken Stevens, Joseph R. Cavallaro, Tong Zhang 0002, editors, Great Lakes Symposium on VLSI 2012, GLSVLSI'12, Salt Lake Cit, UT, USA, May 3-4, 2012. pages 45-50, ACM, 2012. [doi]
Abstract is missing.