Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains

Lei Cheng, Deming Chen, Martin D. F. Wong, Mike Hutton, Jason Govig. Timing constraint-driven technology mapping for FPGAs considering false paths and multi-clock domains. In Georges G. E. Gielen, editor, 2007 International Conference on Computer-Aided Design (ICCAD 07), November 5-8, 2007, San Jose, CA, USA. pages 370-375, IEEE, 2007. [doi]

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