An Efficient Two-Level Partitioning Algorithm for VLSI Circuits

Jong-Sheng Cherng, Sao-Jie Chen, Chia-Chun Tsai, Jan-Ming Ho. An Efficient Two-Level Partitioning Algorithm for VLSI Circuits. In Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong. pages 69-72, IEEE, 1999. [doi]

Abstract

Abstract is missing.