A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM

Sammy Cheung, Kar Keng Chua, Boon-Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei-Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong. A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 143-146, IEEE, 2000. [doi]

Authors

Sammy Cheung

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Kar Keng Chua

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Boon-Jin Ang

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Thow Pang Chong

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Wei Lian Goay

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Wei-Yee Koay

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Sin Wo Kuan

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Chooi Pei Lim

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Jiunn Shyong Oon

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Theam Thye See

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Chiakang Sung

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Kim Pin Tan

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Yu Fong Tan

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Choong Kit Wong

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