A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM - researchr publication authors

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Sammy Cheung, Kar Keng Chua, Boon-Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei-Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong. A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 143-146, IEEE, 2000. [doi]

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