A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM

Sammy Cheung, Kar Keng Chua, Boon-Jin Ang, Thow Pang Chong, Wei Lian Goay, Wei-Yee Koay, Sin Wo Kuan, Chooi Pei Lim, Jiunn Shyong Oon, Theam Thye See, Chiakang Sung, Kim Pin Tan, Yu Fong Tan, Choong Kit Wong. A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM. In Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000. pages 143-146, IEEE, 2000. [doi]

@inproceedings{CheungCACGKKLOS00,
  title = {A million gate PLD with 622 MHz I/O interface, multiple PLLs and high performance embedded CAM},
  author = {Sammy Cheung and Kar Keng Chua and Boon-Jin Ang and Thow Pang Chong and Wei Lian Goay and Wei-Yee Koay and Sin Wo Kuan and Chooi Pei Lim and Jiunn Shyong Oon and Theam Thye See and Chiakang Sung and Kim Pin Tan and Yu Fong Tan and Choong Kit Wong},
  year = {2000},
  doi = {10.1109/CICC.2000.852636},
  url = {https://doi.org/10.1109/CICC.2000.852636},
  researchr = {https://researchr.org/publication/CheungCACGKKLOS00},
  cites = {0},
  citedby = {0},
  pages = {143-146},
  booktitle = {Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, CICC 2000, Orlando, FL, USA, May 21-24, 2000},
  publisher = {IEEE},
  isbn = {0-7803-5809-0},
}