-1.1V to +1.1V 3: 1 Power Switch Architecture for Controlling Body Bias of SRAM Array in 28nm UTBB CMOS FDSOI

Amit Chhabra, Vikas Rana. -1.1V to +1.1V 3: 1 Power Switch Architecture for Controlling Body Bias of SRAM Array in 28nm UTBB CMOS FDSOI. In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016. pages 179-184, IEEE Computer Society, 2016. [doi]

Authors

Amit Chhabra

This author has not been identified. Look up 'Amit Chhabra' in Google

Vikas Rana

This author has not been identified. Look up 'Vikas Rana' in Google