Yong-Suk Cho, Jae Yeon Choi. A Hardware Implementation of Word-Parallel Bit-Serial Polynomial Basis Multiplier. In Tai-Hoon Kim, Hyun-seob Cho, Osvaldo Gervasi, Stephen S. Yau, editors, Computer Applications for Graphics, Grid Computing, and Industrial Environment - International Conferences, GDC, IESH and CGAG 2012, Held as Part of the Future Generation Information Technology Conference, FGIT 2012, Gangneug, Korea, December 16-19, 2012. Proceedings. Volume 351 of Communications in Computer and Information Science, pages 176-181, Springer, 2012. [doi]
Abstract is missing.