A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques

Hee-Cheol Choi, Young-Ju Kim, Kyung-Hoon Lee, Younglok Kim, Seung-Hoon Lee. A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques. I. J. Circuit Theory and Applications, 37(9):955-967, 2009. [doi]

Abstract

Abstract is missing.