A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology

Yuan-Hsi Chou, Shih-Lien Lu. A High Performance, Low Energy, Compact Masked 128-Bit AES in 22nm CMOS Technology. In International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2019, Hsinchu, Taiwan, April 22-25, 2019. pages 1-4, IEEE, 2019. [doi]

Abstract

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