Chih-Hsun Chou, Fong Pong, Nian-Feng Tzeng. Speedy FPGA-based packet classifiers with low on-chip memory requirements. In Katherine Compton, Brad L. Hutchings, editors, Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012. pages 11-20, ACM, 2012. [doi]
@inproceedings{ChouPT12,
title = {Speedy FPGA-based packet classifiers with low on-chip memory requirements},
author = {Chih-Hsun Chou and Fong Pong and Nian-Feng Tzeng},
year = {2012},
doi = {10.1145/2145694.2145697},
url = {http://doi.acm.org/10.1145/2145694.2145697},
researchr = {https://researchr.org/publication/ChouPT12},
cites = {0},
citedby = {0},
pages = {11-20},
booktitle = {Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, FPGA 2012, Monterey, California, USA, February 22-24, 2012},
editor = {Katherine Compton and Brad L. Hutchings},
publisher = {ACM},
isbn = {978-1-4503-1155-7},
}