A 10-b 100-MS/s pipelined ADC with an optimized bit-stage resolution in 65nm CMOS technology - researchr publication

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Pasquale Delizia, Gianni Saccomanno, Stefano D Amico, Andrea Baschirotto. A 10-b 100-MS/s pipelined ADC with an optimized bit-stage resolution in 65nm CMOS technology. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 4033-4036, IEEE, 2010. [doi]

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