An Automatic Design Flow for Mapping Application onto a 2D Mesh NoC Architecture

Julien Delorme. An Automatic Design Flow for Mapping Application onto a 2D Mesh NoC Architecture. In Nadine Azémard, Lars J. Svensson, editors, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings. Volume 4644 of Lecture Notes in Computer Science, pages 31-42, Springer, 2007. [doi]

Abstract

Abstract is missing.