Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen. DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks. In 2012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012. pages 1-10, IEEE Computer Society, 2012. [doi]
Abstract is missing.