Trading cache hit rate for memory performance

Wei Ding, Mahmut T. Kandemir, Diana Guttman, Adwait Jog, Chita R. Das, Praveen Yedlapalli. Trading cache hit rate for memory performance. In José Nelson Amaral, Josep Torrellas, editors, International Conference on Parallel Architectures and Compilation, PACT '14, Edmonton, AB, Canada, August 24-27, 2014. pages 357-368, ACM, 2014. [doi]

Abstract

Abstract is missing.