High performance implementation of Neural Networks by networks on chip with 5-port 2-virtual channels

Yiping Dong, Zhen Lin, Yan Li, Takahiro Watanabe. High performance implementation of Neural Networks by networks on chip with 5-port 2-virtual channels. In International Symposium on Circuits and Systems (ISCAS 2010), May 30 - June 2, 2010, Paris, France. pages 381-384, IEEE, 2010. [doi]

Abstract

Abstract is missing.