Testing the Logic Cells and Interconnect Resources for FPGAs

Abderrahim Doumar, Hideo Ito. Testing the Logic Cells and Interconnect Resources for FPGAs. In 8th Asian Test Symposium (ATS 99), 16-18 November 1999, Shanghai, China. pages 369-374, IEEE Computer Society, 1999. [doi]

Abstract

Abstract is missing.