Performance impacts and limitations of hardware memory access trace collection

Nicholas C. Doyle, Eric Matthews, Graham M. Holland, Alexandra Fedorova, Lesley Shannon. Performance impacts and limitations of hardware memory access trace collection. In David Atienza, Giorgio Di Natale, editors, Design, Automation & Test in Europe Conference & Exhibition, DATE 2017, Lausanne, Switzerland, March 27-31, 2017. pages 506-511, IEEE, 2017. [doi]

Abstract

Abstract is missing.