High-level linear projection circuit design optimization framework for FPGAs under over-clocking

Rui Policarpo Duarte, Christos-Savvas Bouganis. High-level linear projection circuit design optimization framework for FPGAs under over-clocking. In Dirk Koch, Satnam Singh, Jim Tørresen, editors, 22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012. pages 723-726, IEEE, 2012. [doi]

@inproceedings{DuarteB12-0,
  title = {High-level linear projection circuit design optimization framework for FPGAs under over-clocking},
  author = {Rui Policarpo Duarte and Christos-Savvas Bouganis},
  year = {2012},
  doi = {10.1109/FPL.2012.6339162},
  url = {http://dx.doi.org/10.1109/FPL.2012.6339162},
  researchr = {https://researchr.org/publication/DuarteB12-0},
  cites = {0},
  citedby = {0},
  pages = {723-726},
  booktitle = {22nd International Conference on Field Programmable Logic and Applications (FPL), Oslo, Norway, August 29-31, 2012},
  editor = {Dirk Koch and Satnam Singh and Jim Tørresen},
  publisher = {IEEE},
  isbn = {978-1-4673-2257-7},
}