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Thomas H. Dunigan Jr., Jeffrey S. Vetter, Patrick H. Worley. Performance evaluation of the Cray X1 distributed shared memory architecture. In Proceedings of the 12th Annual IEEE Symposium on High Performance Interconnects, HOTIC 2004, August 22-24, 2004, Stanford, CA, USA. pages 20-25, IEEE, 2004. [doi]

The following publications are possibly variants of this publication:

Performance Evaluation of the Cray X1 Distributed Shared-Memory ArchitectureThomas H. Dunigan Jr., Jeffrey S. Vetter, James B. White III, Patrick H. Worley. micro, 25(1):30-40, 2005. [doi]

Early Evaluation of the Cray X1Thomas H. Dunigan, Mark R. Fahey, James B. White III, Patrick H. Worley. sc 2003: 18 [doi]

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