Ahmed S. Eissa, Mahmoud A. Elmohr, Mostafa A. Saleh, Khaled E. Ahmed, Mohammed M. Farag. SHA-3 Instruction Set Extension for A 32-bit RISC processor architecture. In 27th IEEE International Conference on Application-specific Systems, Architectures and Processors, ASAP 2016, London, United Kingdom, July 6-8, 2016. pages 233-234, IEEE Computer Society, 2016. [doi]
Abstract is missing.