Parallelization of Simulated Annealing Algorithm for FPGA Placement and Routing

Rajesh Eswarawaka, Pavan Kumar Pagadala, B. Eswara Reddy, Tarun Rao. Parallelization of Simulated Annealing Algorithm for FPGA Placement and Routing. In Millie Pant, Kusum Deep, Jagdish Chand Bansal, Atulya Nagar, Kedar Nath Das, editors, Proceedings of Fifth International Conference on Soft Computing for Problem Solving - SocProS 2015, Volume 1, Saharanpur, Uttar Pradesh, India, December 18-20, 2015. Volume 436 of Advances in Intelligent Systems and Computing, pages 1001-1013, Springer, 2015. [doi]

Abstract

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