S. Fahmy, Markus Dietl, Puneet Sareen, Maurits Ortmanns, Jens Anders. A BW-tracking semi-digital PLL with near-optimal VCO phase noise shaping in low-cost 0.4 µm CMOS achieving 700 fs rms phase jitter. In Nordic Circuits and Systems Conference, NORCAS 2015: NORCHIP & International Symposium on System-on-Chip (SoC), Oslo, Norway, October 26-28, 2015. pages 1-4, IEEE, 2015. [doi]
Abstract is missing.